1. Field of the Invention
This invention relates to the fabrication of semiconductor devices and more specifically, to a new method for annealing and well drive of an implanted well in a CMOS device on a bare silicon wafer.
2. Description of Related Art
Semiconductor manufacturing technology has advanced to the point where a single die may contain millions of active devices. Illustrative of this advancement is the fact that since the late 1960's there has been over a two-hundred-fold increase in functional density, and twenty-fold increase in speed of integrated circuits. In light of the direction and demands of semiconductor manufacturing CMOS is now the dominant integrated circuit technology.
In CMOS fabrication the silicon wafers are subjected to many elevated temperature steps in order to effect a variety of changes in the material properties of the wafer and fabricated device. One of the high temperature processes used in CMOS technology is ion implantation to drive in the wells used in the devices. Ion implantation has many advantages including more precise control of the number of impurity atoms introduced into the wafer substrate. Unfortunately ion implantation cannot be achieved without damage to the material structure of the target substrate.
Defects in the silicon substrate impact important functional parameters which can cause device failures by excessive leakage currents, etc. To restore the target material to its pre-ion-implantation condition, additional processing must be performed on the wafer. Each additional process step that is required subjects the wafer to an additional source of stress and potentially introduces new insults and injuries to the wafer and fabricated device. As the functional density and speed of integrated circuits increases, there is less ability for the wafers to tolerate functional imperfections introduced during fabrication and manufacture and still operate.
What is still needed is improved fabrication processes that allow better control of the stresses and exposures to a silicon substrate and reduces the total number of process steps required.